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Avinash Karanth
Ohio University
$3,209,783
Attributed
$4,349,415
Total exposure
10
Grants
10
Lead (contact PI)
Attributed= this PI's even-split share of every grant they're on (the fair, additive number). Exposure = full size of all those grants.
Funding over time
peak $1.4M · FY2009–23$2M$1.5M$1M$500K$0
'09
'10
'11
'12
'13
'14
'15
'16
'17
'18
'19
'20
'21
'22
'23
Funding mix
By agency
NSF$4,349,415 · 10
By mechanism
—$4,349,415 · 10
Top collaborators
- Razvan C Bunescu2 shared
- David W Juedes1 shared
- David W Matolak1 shared
- James Stewart1 shared
- Savas Kaya1 shared
Grant awards (10)
Collaborative Research: DESC: Type II: Multi-Function Cross-Layer Electro-Optic Fabrics for Reliable and Sustainable Computing Systems$1,000,000
· FY2023 · CSE · contact PI
Collaborative Research: SHF: Medium: EPIC: Exploiting Photonic Interconnects for Resilient Data Communication and Acceleration in Energy-Efficient Chiplet-based Architectures$447,691
· FY2023 · CSE · contact PI
SaTC: CORE: Small: Language Abstractions for Reconfigurable Hardware Monitors on Manycore Architectures$515,449
· FY2020 · CSE · contact PI
SHF: Medium: Collaborative Research: Photonic Neural Network Accelerator for Energy-efficient Heterogeneous Multicore Architectures$539,999
· FY2019 · CSE · contact PI
SHF: Medium: Collaborative Research: Machine Learning Enabled Network-on-Chip Architectures for Optimized Energy, Performance and Reliability$524,000
· FY2017 · CSE · contact PI
SHF: Small: Collaborative Research: A Holistic Design Methodology for Fault-Tolerant and Robust Network-on-Chips (NoCs) Architectures$208,000
· FY2014 · CSE · contact PI
Collaborative Research:EAGER:Exploiting Heterogeneity in Emerging Interconnect Technologies for Building Highly Scalable and Power-Efficient Network-on-Chips for Many-core Systems$59,999
· FY2013 · ENG · contact PI
CAREER: Design of Reconfigurable Power and Area-Efficient Nanophotonic Architectures for Future Multi-cores$523,840
· FY2011 · CSE · contact PI
Power-Efficient Reconfigurable Wireless Network-on-Chip (NoC) Interconnects for Future Many-core Architectures$396,000
· FY2011 · ENG · contact PI
SHF: Small: Collaborative Research: Design of Power and Area Efficient, Fault-tolerant Network-on-Chip Circuits and Architectures$134,437
· FY2009 · CSE · contact PI