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Luca Carloni
Columbia University
$3,466,646
Attributed
$5,534,025
Total exposure
11
Grants
9
Lead (contact PI)
Attributed= this PI's even-split share of every grant they're on (the fair, additive number). Exposure = full size of all those grants.
Funding over time
peak $1.3M · FY2006–18$2M$1.5M$1M$500K$0
'06
'07
'08
'09
'10
'11
'12
'13
'14
'15
'16
'17
'18
Funding mix
By agency
NSF$5,534,025 · 11
By mechanism
—$5,534,025 · 11
Top collaborators
- Kenneth L Shepard3 shared
- Keren Bergman2 shared
- Alexander L Gaeta1 shared
- Liam Paninski1 shared
- Michal Lipson1 shared
Grant awards (11)
SHF : Medium : Collaborative Research: Decentralized On-Chip Infrastructure for Robustness and Portability in Heterogeneous Multicores$450,000
· FY2018 · CSE · contact PI
E2CDA: Type I: Collaborative Research: Energy Efficient Computing with Chip-Based Photonics$1,145,616
· FY2016 · CSE
BIGDATA: Collaborative Research: IA: Hardware and Software for Spike Detection and Sorting in Massively Parallel Electrophysiological Recording Systems for the Brain$898,000
· FY2015 · CSE
SHF: Small: Rethinking CAD for System-Level Design via Interactivity, Learning, and Collaboration$450,000
· FY2015 · CSE · contact PI
SHF: Small: Synthesis-Driven Methods for Reuse, Integration, and Programming of Specialized Accelerators in Systems-on-Chip$450,000
· FY2012 · CSE · contact PI
EAGER: Collaborative Research: Heterogeneous Cores, Memory-Hierarchy and Communication Architectures for Future CMPs$100,000
· FY2011 · CSE · contact PI
SHF: Small: Integrated Infrastructures for On-Chip Communication and Power Management in Message-Passing Multicore Processors$532,000
· FY2010 · CSE · contact PI
CPS: Medium: Collaborative Research: GOALI: Methods for Network-Enabled Embedded Monitoring and Control for High-Performance Buildings$391,000
· FY2010 · CSE · contact PI
CPA-CSA: Photonic Interconnection Networks for Chip-Multiprocessor Computing Systems$400,000
· FY2008 · CSE · contact PI
CAREER: Integrating Control, Computation, and Communication - A Design Automation Flow for Distributed Embedded Systems$430,409
· FY2007 · CSE · contact PI
CMOS VLSI Design of Low Power Scalable Heterogeneous Networks for Multi-Core Systems-on-Chip$287,000
· FY2006 · CSE · contact PI