GGrantIndex
← Leaderboards

Sachin S Sapatnekar

University Of Minnesota-Twin Cities

$5,303,499
Attributed
$9,132,329
Total exposure
15
Grants
11
Lead (contact PI)

Attributed= this PI's even-split share of every grant they're on (the fair, additive number). Exposure = full size of all those grants.

Funding over time

peak $1.3M · FY200625
$2M$1.5M$1M$500K$0
'06
'07
'08
'09
'10
'11
'12
'13
'14
'15
'16
'17
'18
'19
'20
'21
'22
'23
'24
'25

Funding mix

By agency

NSF$9,132,329 · 15

By mechanism

$9,132,329 · 15

Top collaborators

Grant awards (15)

SHF: Small: Enhancing Performance and Reliability in On-Chip Power Distribution Networks$600,000
· FY2025 · CSE · contact PI
Collaborative Research: SHF: Medium: Tiny Chiplets for Big AI: A Reconfigurable-On-Package System$800,000
· FY2024 · CSE
Collaborative Research: DESC: Type I: Towards Reduce- and Reuse-based Design of VLSI Systems with Heterogeneous Integration$200,000
· FY2023 · CSE · contact PI
Collaborative Research: SHF: Medium: Automated energy-efficient sensor data winnowing using native analog processing$900,000
· FY2022 · CSE · contact PI
SHF: Medium: Time Based Deep Neural Networks: An Integrated Hardware-Software Approach$900,000
· FY2018 · CSE
SPX: Scalable In-Memory Processing Using Spintronics$800,000
· FY2017 · CSE
SHF: Small: Enchancing the Reliability of Mixed-Signal Integrated Circuits$450,000
· FY2017 · CSE · contact PI
SHF: Small: Collaborative Research:Variation-Resilient VLSI Systems with Cross-Layer Controlled Approximation$210,000
· FY2015 · CSE · contact PI
SHF: Small: Stress Management in Integrated Circuits$450,000
· FY2014 · CSE · contact PI
SHF: Medium: Collaborative Research: AgELESS: Aging Estimation and Lifetime Enhancement in Silicon Systems$560,000
· FY2012 · CSE · contact PI
SHF: Small: Enabling Resiliency in Nanometer-Scale CMOS Circuits$400,000
· FY2010 · CSE · contact PI
An Integrated Design and CAD Approach for Efficient Power Delivery in Multicore Processors$420,000
· FY2009 · ENG · contact PI
Thermal Effects in Integrated Circuits$300,000
· FY2006 · CSE · contact PI
ITR: Methodologies for Robust Design of Information Systems under Multiple Sources of Uncertainty$1,807,329
· FY2002 · CSE
Design Automation Techniques for SOI and High-Performance Bulk CMOS Designs$335,000
· FY2001 · CSE · contact PI