SaTC: CORE: Small: Novel Hardware Acceleration for Post-Quantum Digital Signature Scheme FALCON

Villanova University, Villanova PA

Investigators

Abstract

The rapid progress in quantum computing has attracted increasing attention in various communities. Specifically, it is proven that the existing public-key cryptosystems like Rivest Shamir Adleman (RSA) and Elliptic Curve Cryptography (ECC) can be broken by the large-scale quantum computers executing a type of quantum computing algorithm invented by American Mathematician Peter Shor. To address this threat, post-quantum cryptography (PQC) emerges as a practical and effective cryptosystem that has the potential to resist attacks from quantum computers. Efforts and initiatives from government institutions have been carried out since 2016. In July 2022, four PQC algorithms were selected to be standardized for general purpose usage. Following the NIST PQC standardization efforts, many research investigations in the field have gradually switched to the implementation side, especially regarding the efficient acceleration of these NIST-selected PQC on hardware platforms. This project follows this trend to conduct a comprehensive exploration of novel hardware acceleration for FALCON, one of the NIST-selected digital signature PQC schemes. Overall, this project echoes the recent U.S. National Security Memorandum on promoting PQC research to mitigate risks to vulnerable cryptographic systems, and will significantly impact the development of next-generation national security technologies in this country. Finally, this project team offers an opportunity to promote undergraduate research in the area of PQC. This project investigates the following three aspects: (i) new fast algorithms and novel computer arithmetic techniques for the high-complexity functions/components in FALCON, targeting significant complexity reduction with dedicated design; (ii) innovative algorithm-to-architecture co-design strategies for components/modules that are difficult to design in hardware, targeting ease of hardware design with superior efficiency; (iii) a full-hardware accelerator design framework finalization for FALCON, with the consideration of practical secure implementation. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.