EAGER: Exploration of 3D-Transistors with 2D-TMDs for Ultimate Miniaturization

University Of California-Santa Barbara, Santa Barbara CA

Investigators

Abstract

Continued miniaturization of metal-oxide-semiconductor field-effect-transistors (MOSFETs) to yield unremitting improvements in system integration density, performance, and energy-efficiency has necessitated the exploration of alternative novel device architectures. Gate-all-around (GAA) architecture is one of such promising alternatives to the state-of-the-art FinFET (essentially a double-gate MOSFET), that with its superior gate control over the channel, reduced short-channel effects, and increased ON-current, can sustain transistor miniaturization down to few nanometer channel lengths if implemented with suitable channel materials. In this regard, the implementation of GAA architectures with emerging layered two-dimensional materials (2DM) can significantly enhance the capabilities of the GAA transistors, compared to implementations with conventional semiconductors such as Si, because of the several advantages that 2DM offers. These benefits include excellent electrostatics (gate control of channel charge) afforded by the atomic thinness and pristine interfaces of the 2DM body that enable channel length scaling without sacrificing gate control, uniform body thicknesses offering low device-to-device variability and robust device performance, large bandgap and moderate carrier effective mass (compared to Si) offering suppressed OFF-current. The PI is a pioneer in the field of 2D-CMOS and has made major contributions to every aspect of these transistors - from fundamental charge injection and transport theory to the design and experimental demonstrations of some of the best transistors reported in the literature. The two-year exploratory project will involve the design, fabrication, and characterization of 2DM based GAA FETs (including nanosheet FETs) to extend the scalability of the MOSFET and thereby sustain Moore’s Law. The application space of the project includes every conceivable electronic product that runs on MOSFETs including microprocessors and memories. Therefore the project is expected to have wide implications for the semiconductor and electronics industries. Moreover, the PI will use various well established educational platforms to disseminate the research results and to make them available to a wide range of users. The overall project also ties research to education at all levels involving K-12, undergraduates, and graduates, partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of a broad range of groups in nanoscience and engineering. The project will employ a distinctive atoms-to-applications theory to study and demonstrate the promise of employing two-dimensional materials (2DM) in designing gate-all-around (GAA) field-effect-transistor (FET) architectures, which is radically different from the approaches pursued till date. While theoretical simulations from the PI’s group guided by first principles quantum transport theory – non equilibrium Green’s function (NEGF), have demonstrated that suitably designed planar 2D-FETs with 2D transition-metal-dichalcogenide (TMD) as the channel material can outperform Si counterparts in both low-standby-power and high-performance transistor designs for sub-10 nm channel lengths, such a scaling and performance analysis study for GAA architectures have not been carried out yet. Fundamentally, the process and growth optimizations required to realize such functional device architecture are also at their infancy and have not been specifically tailored for this architecture. The project therefore includes a detailed performance and scalability analysis for both current and capacitance metrics of 2DM enabled 3D GAA transistor architectures (such as nanosheet FETs) employing first principles density functional theory (DFT) and NEGF transport formalism; employment (and improvement) of advanced contact engineering for efficiently contacting stacked n-/p-2DM channels in 3D geometry; identification of optimal high-κ dielectric stack for integration into the 2D-TMD GAA transistor architecture; and finally, fabrication and realistic demonstration of single- to multi-stack channel proof-of-concept GAA transistor architectures permitted by available nanofabrication facilities. The interdisciplinary nature of the research project, spanning fundamental 2D materials physics, device design, and nano-fabrication techniques, as well as theoretical simulations and compact modeling, will ensure that the proposed research ideas are feasible and tailored to deliver optimal results. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.