Energy-Efficient Broadband Spectrum Sensing in Real Time Based on a Frequency-Domain Analog Signal Processor

Pennsylvania State Univ University Park, University Park PA

Investigators

Abstract

RF spectrum is a scarce resource as the number of wireless electronic devices continues to explode. To maximize the utilization of the limited spectrum resource, temporal and spatial spectrum sharing is essential in next-generation wireless networks. Real-time spectrum sensing is a crucial technology to enable dynamic spectrum sharing. It identifies available spectrum instantaneously in the crowded frequency spectrum and helps the networks to dynamically adapt operating parameters such as transmit power, carrier frequency, and modulation format. As more applications continue to occupy millimeter-wave (mm-wave) spectrum, broadband spectrum sensing which covers both traditionally spectrum-congested frequency bands and new mm-wave bands will be needed. However, scanning a very broad spectrum bandwidth of more than 10 GHz is challenging due to the power-hungry high-speed analog-to-digital converter (ADC) and digital signal processing (DSP) circuitry. To address these challenges, this project will explore a novel silicon-based frequency domain analog signal processor co-designed with advanced signal processing algorithms. The research will be the first theoretical and experimental study of applying frequency-dependent constructive and destructive interference in an array of digitally programmable on-chip elements to frequency-domain analog signal processing. The research outcomes from this project can be adopted by industry to benefit a wide range of semiconductor and wireless network companies. The success of the project will also help maintain the continuous leadership of the United States in wireless technologies and semiconductors by training students to be innovative engineers in wireless industry. The goal of this project is to develop a silicon-based frequency domain analog signal processor co-designed with advanced signal processing algorithms to realize an energy-efficient (< 100 mW power consumption), broadband (>25 GHz bandwidth), and low-latency (<100 ns scan time) spectrum sensor. The design is based on frequency-dependent constructive and destructive interference in an array of on-chip programmable dispersion-engineered elements to create the frequency response of a digitally tunable narrow-bandpass filter. The proposed analog processor can sweep the center frequency of a "pencil-like" narrow passband linearly over a wide frequency range for spectrum scanning while maintaining a constant bandwidth. For the silicon implementation of the proposed analog processor, several fundamental IC and architecture-level innovations will be explored for the design of 1) a dispersion-engineered element that consists of a multi-functional phase shifter and cascaded delay cells, 2) a scalable path-sharing delayed signal combiner for chip area reduction, and 3) a digital control circuitry co-designed with advanced signal processing algorithms to orchestrate the dispersion-engineered elements for the optimal trade-off among resolution bandwidth, scan range, latency, and energy efficiency. The proposed signal processing algorithms leverage the recent advances in compressive sensing and hierarchical group testing and utilize the programmability of the proposed architecture to improve the sensing performance further. The successful development of the proposed broadband, energy-efficient, low-latency spectrum sensing will enable dynamic spectrum sharing to revolutionize the operation and management of modern and future wireless networks by dramatically alleviating the constantly increasing demands of the limited radio spectrum and maximizing utilization of the spectrum. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.