SaTC: CORE: Small: Emerging Security Challenges and a Solution Framework for FPGA-accelerated Cloud Computing

University Of Massachusetts Amherst, Amherst MA

Investigators

Abstract

Field programmable gate arrays (FPGAs) have been extensively used in data centers to make their tasks run faster. Unlike conventional computers, FPGAs can be configured and/or programmed differently for different tasks and shared among multiple users, adding agility to cloud environments. However, this flexibility adds security risks. For example, if many users are sharing an FPGA, a malicious user can steal or corrupt other users’ data. The project’s novelties are developing novel ways to protect FPGAs from these harmful attacks. The project's broader significance and importance are making cloud computing safer and easier to use and promoting education and research in FPGA security. This project aims to address FPGA security concerns by introducing novel approaches that prevent attacks compromising user data, causing corruption or physical damage to the data center. By implementing secure operating mechanisms, controlled sharing of FPGAs among multiple users is made possible. A security and queue management unit (SQMU) are embedded within the FPGA to maintain process isolation and allow secure sharing without sacrificing performance and energy efficiency. The proposed structure enables multiple applications to securely share the same accelerator or utilize different accelerators on the same FPGA. Access to FPGA interfaces is tightly controlled to prevent denial-of-service attacks, and memory access is isolated to authorized pages. Additionally, the project contributes to FPGA state saving to support process preemption. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.