ACED Fab: Ultrafast, low-power AI chip with a new class of MRAM for learning and inference at edge

Stanford University, Stanford CA

Investigators

Abstract

The collaborative team of this project under Advanced Chip Engineering Design and Fabrication (ACED Fab) program will be working on an exciting advancement in the field of artificial intelligence (AI) for edge computing, such as secured machine learning based on personalized or sensitive data in smartphones (a type of edge devices) without resorting to a server at a remote data center. The project introduces a new class of Magnetoresistive Random Access Memory (MRAM) called Spin-transfer torque (STT) Assisted Spin-orbit torque (SOT)-MRAM (SAS-MRAM) which features ultralow power consumption and ultrafast write speeds. By co-designing SAS-MRAM with CMOS circuits, the project aims to create energy-efficient edge AI systems. SAS-MRAM's non-volatile nature eliminates standby leakage power, making edge-AI chips more energy-efficient at the system level compared to existing approaches using Static Random Access Memory (SRAM). The project’s activities extend beyond technological advancements, with plans of K-12 STEM outreach, undergraduate/graduate training, curriculum development in innovation and entrepreneurship, and broadening participation of groups in the microelectronics STEM field and semiconductor industry. The team’s efforts in education will contribute to an innovative future of the microelectronics industry. The new SAS-MRAM with ultralow power and ultrafast write speed will be co-designed with CMOS circuits for energy-efficient edge AI applications. The SAS-MRAM will be fabricated on top of a TN40G CMOS die through a custom back-end-of-line (BEOL) process. The team will systematically perform micromagnetic simulation and HSpice simulation to build Process Development Kits (PDKs) required for co-designing SAS-MRAM and CMOS circuits. Furthermore, the project will leverage SAS-MRAM to design, optimize, and tape-out an In-Memory Computing (IMC) chip prototype for edge-AI, which could implement both on-chip inference and training computation. Finally, the project will develop new continual learning algorithms that could minimize the memory weight updates (i.e., memory writes) and computing complexity, allowing the AI system to learn new data without forgetting previously learned knowledge. The resulting edge-AI chips will be significantly more energy-efficient at system level than the prevalent counterparts based on SRAM due to zero standby leakage power for non-volatile MRAM. On-device training/learning based on SAS-MRAM is potentially ultrafast due to lower latency from denser bit cells and multi-bit writing with shared SOT write lines. The project can potentially revolutionize edge AI devices and systems by leveraging SAS-MRAM and in-memory computing to create energy-efficient AI systems with improved performance. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.