CRII: FET: Ferroelectric FET based flexible circuits and system design

North Dakota State University Fargo, Fargo ND

Investigators

Abstract

Current computing systems face major challenges in dealing with applications, having rapidly increasing data storage and processing requirements. This implies the need for efficient and dense data storage. A multi-level cell (MLC) is a memory cell capable of storing more than a single bit of information in a single device, and thus can be used for dense efficient storage. However in conventional computing systems, data stored in memory needs to get transferred to computing units for processing, resulting in excessive power dissipation and delay. Therefore, there exists a need for a computing paradigm that limits data movement, does efficient data transfer and handles the challenges associated with MLC memories. This project investigates the incorporation of emerging technology designs into existing Complementary Metal Oxide Semiconductor (CMOS) based computing systems to satisfy the above-mentioned requirements. Learnings and insights developed from this project will be incorporated into computer-engineering undergraduate and graduate courses. Investigator will also involve students from underrepresented groups and undergraduate students in this project. Investigator chooses an emerging device technology called ferroelectric field-effect transistor (FeFET), and the project will focus on two specific research tasks. The first task will develop circuit components amenable to traditional single-level cell and dense multi-level cell (MLC) memory architectures. MLC cells store multiple bits by exploiting a particular device property and MLC data to binary conversion requires complex peripheral circuits. This project aims to design compact flexible peripheral circuits by leveraging the threshold voltage programmability of FeFETs. In the second task, investigator will utilize the structural features of FeFET to design flexible multi-directional data access memories and caches. Applications exhibiting row-column directional preferences such as matrix operations and database operations will especially benefit from a flexible directional access system as it limits the unnecessary data transfer from memory to processing units. Investigator will also explore the reuse of flexible peripherals for in-situ computing to further limit the data transfer and to increase the computing efficiency. This project is jointly funded by the Foundations of Emerging Technology (FET) program of CISE/CCF Division, and the Established Program to Stimulate Competitive Research (EPSCoR). This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.