CAREER: Power Management Solutions for Systems-on-Chip

Wayne State University, Detroit MI

Investigators

Abstract

Advancements in semiconductor technologies and systems-on-chip have enabled efficient and intelligent systems in automotive, edge computing, and internet-of-things. A power management unit is a mainstream circuit that manages the power flow in systems-on-chip using various power converters, including switched-capacitor circuits. With the increasing demands for higher performance and multifunctional systems-on-chip, designing efficient, compact, and integrated power management unit faces many challenges. First, an accurate and fast behavioral model for switched-capacitor circuits is required to assist designers in optimizing various parameters at the early design stages. Second, there is a critical need for better switched-capacitor circuits that can achieve both high power and area efficiency. Third, efficient control circuits are required to support switched-capacitor circuits and other power converters to enhance power efficiency. The broad goal of this CAREER proposal is to pursue innovative research directions in mixed-signal design at modeling, converter architecture, and circuit levels to address these challenges and pave the way for ground-breaking innovations in modeling and circuit implementations. This CAREER proposal will significantly impact the research front by advancing the knowledge in power management design and providing the research community with new models and circuits that can be applied to various applications. The educational aspects include filling the gap in the electrical and computer engineering curriculum related to mixed-signal circuit design. The outreach activities include developing a summer course for K-12 students through collaboration with the K-12 Educational Outreach Office at Wayne State University. Also, the activities will include collaborating with industry to train students on chip design tools and provide them with timely and relevant skill sets. This CAREER explores new design directions at the modeling, converter architecture, and control circuit levels toward efficient power management units. At the modeling level, a new resistor-network behavioral model is proposed to describe the electrical characteristics of generic switched-capacitor circuits over the entire operating frequency range, unlocking new possibilities to optimize switched-capacitor circuits quickly and accurately. At the architecture level, a new stacked charge pump is proposed that provides a high voltage conversion ratio and superior area efficiency by reducing the number of pump capacitors while maintaining high power efficiency. At the circuit level, a new circuit family is proposed that can be used to design power and area-efficient control circuits for various power converters, including multi-stable analog memory for maximum power transfer, a low-power clock generator that enables frequency and pulse width modulation and zero current switching circuits. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.