SaTC: CORE: Small: Generic Circuit Learning from Adaptive Side-Channel Queries

University Of Texas At Dallas, Richardson TX

Investigators

Abstract

This project aims to develop algorithms and techniques for allowing one to learn the hidden structure of a digital or analog circuit from power, timing, and electro-magnetic radiation measurements (so-called side-channels) of the circuit, in a generic (applicable to arbitrary circuits) and adaptive (the algorithm intelligently interacts with the circuit) manner. Such algorithms can be used in various applications most importantly as tools in the arsenal of hardware security and integrity checking. Given the rise in cyber threats especially those that involve hardware access to such versatile adaptive tools become increasingly valuable. The project aims to deliver the developed technology in the form of (open-source) software, benchmarks, papers, machine-learning datasets, and training of an expert future workforce. The project explores this problem along three technical tasks: The first task is dedicated to digital circuits with a focus on solver-based, circuit-based, and statistical/machine-learning-based solutions. The second task is dedicated to analog and mixed-signal circuits. This involves exploring how to model arbitrary analog circuit side-channels and having non-linear solvers and optimizers interact with them for the learning process. The third task is dedicated to utilization, evaluation, and demonstration. This involves taking results from the first two tasks and using them in the context of security analysis of various circuit protection schemes against side-channel attacks, and the detection of malicious hardware modifications. Simulation in software, programmable hardware, discrete components, plus two chip designs are being used to test the proposed methods and algorithms as well. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.