Collaborative Research: EAGER: IC-Cloak: Integrated Circuit Cloaking against Reverse Engineering

University Of California-Davis, Davis CA

Investigators

Abstract

Outsourcing the design and manufacturing of integrated circuits (ICs) has minimized the operating and maintenance costs for a plethora of electronic design companies with reduced time-to-market. However, such outsourcing and benefits lead to complex verification of the fabricated ICs. Additionally, the security threats in terms of reverse engineering the design have surfaced. To address such reverse engineering of ICs, this project proposes insertion of noise in the IC layout that minimizes the probability of success in IC reverse engineering. The insertion of noise must also meet the standard IC design flow requirements and pass the verification and validation. To achieve this goal, this project integrates the adversarial machine learning with the IC design flow to enable efficient IC design protection despite attacker obtaining the scanning electron microscope (SEM)/layout images of a given IC. In the first phase, the project develops a surrogate machine learning model to detect the gates in SEM images, followed by incubation of novel adversarial perturbations under spatial constraints on the SEM images. The perturbations obtained through the adversarial learning will be evaluated and embedded in some of the available open-source standard cell libraries, guaranteeing compatibility with existing IC design flow tools. Successful completion of the project will result in a suite of secure IC cell libraries that are compatible with IC design flows. Specifically, this project (i) develops novel IC cell layouts that cannot be identified by an adversary despite obtaining the images through reverse engineering; (ii) introduces novel adversarial perturbation generation under spatial constraints. Due to the interdisciplinary nature, the outcome of the project impacts a broad variety of researchers in the domains of IC design and adversarial machine learning. The development of library cells from this project will be outsourced with relevant licenses to academia and industry. The project is expected to generated multiple types of data including IC layouts, SEM images, and cell models. All the codes will be written using Python, and SystemC/Verilog (If required). Fully functional and tested codes will be documented and will be made available through GitHub. The website of PIs (http://mymason.gmu.edu/~spudukot) will add a new page for downloading the source codes. Data will be retained at GMU, UC Davis, and UC Irvine for a minimum of three years after conclusion of the award. Data related to students’ research work will be retained for four years after the degree is awarded. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.