CAREER: Reliability of Three-dimensional Interconnects for Heterogeneous Integration: An Integrated Experimental and Modeling Study

The University Of Central Florida Board Of Trustees, Orlando FL

Investigators

Abstract

Three-dimensional integrated circuits (3DIC), where chips are vertically connected by through-substrate vias, is one of the most promising technologies to overcome the materials and processing limitations of Moore’s Law Scaling. This project aims to develop fundamental knowledge and practical solutions to address the critical reliability challenges for the integration and scaling of high density through-substrate vias in 3D heterogeneous integration. Using a combined experimental and modeling approach, the proposed work will study the 3D interconnect system of current interest, namely copper (Cu) through-silicon vias (TSVs), to elucidate the effect of stress, microstructure, and scaling on the deformation and failure mechanisms, model the effect of dimensional scaling on microstructure evolution, device performance and reliability, and develop an innovative solution to control via protrusion and enable reliable 3D interconnects. By solving these critical challenges, this research will generate new knowledges in the reliability of 3D interconnects to enable high density 3D heterogeneous integration, which is critical for a broad range of applications such as high-performance computing, autonomous vehicles, mobile connectivity, and aerospace and defense applications. This project also entails educational and outreach activities aiming at educating and training talents in interconnect reliability to advance America’s scientific and technological leadership in microelectronics technology. The objective of this project is to develop an integrated research program that combines experiments and modeling to address the reliability challenges of three-dimensional (3D) interconnects, which are essential for vertical heterogeneous chip-package integration. Using copper (Cu) through-silicon via (TSV) and via protrusion as a model system, this project will address the important knowledge gaps in the reliability for 3D interconnects, including: 1) establish the quantitative correlation between the microstructure and deformation, which will lead to the identification of critical microstructure features and deformation mechanisms that dictate the high tail of the reliability statistics; 2) determine the effect of scaling on microstructure evolution, device performance and the resulting reliability statistics, which is particularly important for the development of high-density heterogeneous integration; 3) develop methods to control the reliability statistics using approaches based on materials and interface optimization. The fundamental knowledges, practical solutions, and methodologies generated in this work will be appliable to other metallization and substrate systems beyond Cu TSVs. By enabling 3D heterogeneous integration, this project will pave the way for many key applications ranging from mobile devices and consumer electronics to medical devices and autonomous vehicles. The educational component of this project will integrate classroom teaching, research training, and outreach activities to inspire, educate and train students and will produce talented workforce in interconnect reliability at one of the nation’s largest universities by enrollment to help US’s microelectronics industry retain its competitiveness and global leadership. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.