ERI: Composing An Efficient and Adaptive Framework for Real-Time Processing on Next-Gen Edge-Computing Platforms: Models, Architectures, Methodologies, and Prototypes

University Of Colorado At Colorado Springs, Colorado Springs CO

Investigators

Abstract

This award is funded in whole or in part under the American Rescue Plan Act of 2021 (Public Law 117-2) In the Internet of Things (IoT) era, cloud infrastructure alone will not suffice to process and analyze the enormous amount of data being generated from various sensors/devices distributed throughout networks such as smart girds, smart homes, and autonomous vehicles. Traditional cloud infrastructure faces serious challenges when transmitting, processing, and analyzing this enormous amount of data, including: insufficient bandwidth, high latency, unsatisfactory real-time response, high power consumption, and privacy protection issues. Edge computing is emerging as a complementary solution to address the aforementioned issues of cloud infrastructure. However, edge computing is still in its infancy. Also, applications running at the edges of the networks are becoming more complex requiring more processing power. Existing algorithms/techniques for edge applications and conventional computing platforms utilized will not suffice to process and analyze this ever-increasing data and to handle the associated computational complexity, efficiently and effectively. Hence, innovative solutions are needed to propel the edge computing from its infancy, in order to support compute/data-intensive applications on next-gen edge-computing platforms that are heterogenous in nature. To facilitate this endeavor, the main research objective of this proposal is to create an efficient and highly adaptive framework (comprising models, architectures, methodologies, and prototypes) to support and accelerate real-time processing of compute and data intensive applications (including data analytics/mining) on next-gen edge-computing platforms. Our unique framework will dramatically reduce the communication overhead and response latency of the corresponding networks and cloud infrastructure, and will enhance the performance and scalability of the systems. Due to adaptive traits, our solutions can be configured and utilized for broad range of edge applications, and will not be limited to specific application. Also, as an integral part of this research project, we will develop a graduate program in embedded and digital systems domains for both the doctoral and master’s students, since there is a significant demand for research and teaching in these domains in Colorado Springs, due to the high-tech companies in the vicinity. This graduate program will help us to attract and engage many graduate students in embedded/digital systems research, and will strengthen our research quality and output, in addition to producing highly qualified personnel to satisfy the growing demand of industry and academia in these domains. Our main objective and the associated challenges will be addressed and achieved through the following specific research objectives: (1) Perform theoretical and statistical analysis to gain insight into edge computing algorithms; introduce novel analytical models suitable for real-time processing of edge applications/algorithms; (2) Introduce novel, customized, and reconfigurable architectures, techniques, and methodologies for real-time in situ processing of edge applications; create unique techniques to perform design space exploration and to dynamically map/remap the corresponding circuitry and tasks, to enhance speed, area/power-efficiency; create field programmable gate array (FPGA) based prototyping. In this research work, we will introduce unique analytical models that are well suited especially for real-time in situ processing of applications. We will create innovative models, architectures, and methodologies that are generic, parameterized, and scalable; thus, without changing the internal structures, our designs can be used for any edge-computing platform, and can be used to process varying datasets. Our architectures and techniques will be created by performing design space exploration coupled with unique methodologies. We will introduce novel techniques to dynamically reconfigure the whole platform globally and some systems locally, to provide the necessary self-adaptive, self-healing, and self-correcting traits, which in turn will prolong the useful life of the systems while reducing the overall cost. Due to the reconfigurable nature of our designs, our solutions can be configured for other tasks and will not be limited to a specific task. Our adaptive framework can be utilized both on the edge-nodes and on edge-devices. FPGA-based prototyping (on single-chip and multi-chip platforms) will be created to evaluate our proposed architectures, techniques, and methodologies. This project will lead to several major research contributions: (1) create novel analytical models and introduce unique methodologies to characterize software algorithms; (2) introduce decomposition techniques, and guidelines on how to modify software algorithms to be compatible with hardware/platforms; (3) introduce unique methodologies for design space exploration (DSE), perform DSE considering the constraints/requirements of platforms/applications, and create architectures/accelerators/techniques that are generic, parameterized, and scalable; (4) introduce unique methodologies and create central controller to dynamically map/remap circuitry for essential tasks; (5) introduce customized and reconfigurable architectures and techniques for compute/data-intensive applications to further enhance speed, area, and power, and ultimately create FPGA-based prototyping. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.