CAREER: Regulator-Gating (ReGa): A New On-Chip Power Delivery Architecture

University Of Rochester, Rochester NY

Investigators

Abstract

With continuous advancements in the semiconductor industry, transistors with smaller than 20 nm feature size have enabled the integration of multi-billion transistors on a single die. A large proportion of the circuit blocks is either inactive or in a reduced-power state at any given time to satisfy the power and thermal constraints. This utilization wall has urged the semiconductor community to compromise the chip area and the speed of the circuit to reduce the overall power consumption. Despite the significant amount of research and growing necessity for a holistic power optimization technique, existing efforts to minimize power dissipation are typically not coherent and are disjointed into two pieces: i) the dynamic and static power loss at the load circuits is minimized or ii) the power loss during power-conversion is minimized. As a result, more than 32% of the overall power is dissipated during high-to-low voltage conversion before even reaching the load circuits in modern mobile platforms. Neither the preliminary works of the PI nor the previous studies present a holistic approach for the design and management of distributed on-chip power delivery and are of limited use to attain high overall voltage conversion efficiency and thermal-aware design. The ultimate goal of this project is to revisit and fundamentally tailor the design and management of on-chip power delivery infrastructure. As compared to the conventional schemes where the power network is designed targeting the full utilization of the overall chip area, the proposed research will provide an adaptive power delivery infrastructure that is tailored to provide high voltage conversion efficiency during both fully-utilized and under-utilized modes of operation. Novel voltage regulation techniques and support circuits, physical design of power delivery networks, and power management schemes will be proposed. Specific emphasis will be placed on parallel voltage regulation and delivery where the allocation, size, and type of individual regulators are optimized synergistically considering various possible tradeoffs. Regulator-gating will be used specifically to: i) force individual voltage regulators to operate in their most power-efficient region, ii) spread the concentrated heat that causes local hotspots, and iii) turn on the voltage regulators close to the active circuits to reduce noise. The research component of this project has broad implications across all sub-areas of semiconductor-related research as power efficiency has become the primary bottleneck. The education component of this project will provide guidelines on how different teaching techniques can be integrated in undergraduate and graduate level courses to enhance the engineering education. The PI will promote the participation of women and underrepresented minorities in STEM fields and build strong ties with a local historically black college to increase the enrollment of underrepresented minorities at the University of South Florida's Electrical Engineering Department.