FoMR: Using Machine Learning to Design Next Generation Caches and Data Prefetchers

University Of Texas At Austin, Austin TX

Investigators

Abstract

While the general public typically focuses on processor clock speed as a measure of microprocessor performance, it is often the memory system that limits overall system performance, particularly for today's data-hungry uses of computing. This project explores a transformative approach to designing computer hardware, particularly the memory system: Rather than rely solely on human insight and intuition, this approach adapts and leverages machine learning techniques to explore larger and richer design spaces in a more thorough and systematic manner. This approach enables hardware designers to consider more complex design factors than are currently possible. This project consists of two phases. The first phase seeks to dramatically improve traditional memory system components, such as cache replacement policies and data prefetchers, which have been heavily studied but are now ripe for innovation with the use of machine learning. The second phase considers complicating factors such as criticality, the interaction among these components, and the use of new memory technologies. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.