Topological Insulator Field Effect Transistors for Memory and Sensors

George Mason University, Fairfax VA

Investigators

Abstract

Relentless, Exponential progress on Complementary Metal-Oxide-Semiconductor (CMOS) technology over the last four decades has made possible the design and fabrication of the powerful silicon chips which are the engines of the microelectronics revolution which changed contemporary society: Computers, Smart Phones, Internet of things (IoT), Artificial Intelligence (AI), and the list goes on, there is no aspect of modern life that has not been touched by the silicon chip. Progress on conventional CMOS technology has however slowed down significantly, as miniaturization (according to Moore's Law) is reaching fundamental, physics imposed limits. To make progress possible "beyond CMOS", researchers around the world consider new approaches to use new materials (for example, topological insulators), and invent new types of transistors and new types of high-speed, high-density and low-power memory technology. Consequently, the goal of the research in this proposal is to further exploit our understanding of the properties of topological insulator nanowires and thin films to build new-concept field effect transistors with operational principles different than the conventional CMOS technology, while continuing to benefit from the existing vast experience semiconductor industry has accumulated over the years with this technology (CMOS). If successful, the outcomes of the proposed research will also include new memory devices and sensors, made possible by these topological insulator transistors. Graduate, undergraduates and high-school students will have the opportunity to interact with collaborators from Industry and Government Laboratories. The goal of the proposed research is to design and fabricate Topological- Insulator Field-Effect transistors platform to explore and exploit the potential of gate-controlled topological surface state for applications in new-concept nonvolatile memory and sensor devices. The specific aims of this proposal are: (i) to design and fabricate topological insulator transistors with large on-state current and near-zero off-state current; (ii) to explore gate design and device geometry for achieving robust and efficient control of the spin-polarized electron current; (iii) to exploit the spin-polarized electron current for spin-based logic and nonvolatile memory devices with low-power operation; and (iv) to exploit the resulting devices for enhancing the topological photoelectronic effect for infrared sensors with high sensitivity and selectivity. The research involves preparation of novel topological insulator nanowires and thin films, nanoscale device integration, and characterization, with a focus on achieving in the first instance high-quality topological insulator transistors. The topological insulator nanowires and thin films will be grown at wafer scale for in-situ device integration to achieve clean device interfaces and metal contacts. The topological insulator transistors will be fabricated with engineered gate/source/drain contacts and ferromagnetic insulator/channel interface to achieve: high on/off current ratio, large on-state current and sharp switching, with surface states efficiently tuned by the gate-source electric field. This proposal presents a complete route from materials preparation, to device integration and measurement, to applications focusing on logic transistors, nonvolatile memory and sensors. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.