SHF:Small:Scalable Spiking Neural Network Enabled by Probabilistic and Non-Volatile Synapses

Carnegie Mellon University, Pittsburgh PA

Investigators

Abstract

Scaling of integrated circuit (IC) technology for the past few decades has enabled remarkable advancement of computing speed and power efficiency, as evidenced by the cellphone computing that we hold in our hands today that would have corresponded to room-size super computers not long ago. But as we reach fundamental physical limits for scaling to smaller feature sizes at nanometer scale, massive amounts of data can be stored, and super-fast circuits can process the data, such that now the overall system performance is limited by the bottleneck that forms with transferring the data between the memory and the processor. For this reason, alternative computation models, particularly those based on brain-inspired (neuromorphic) computation, have recently resurged as a potential new computing paradigm for certain classes of computing applications and problems. This requires advancements in devices, circuits and computing architectures, along with creation of the education platform that will allow future engineers and computer scientists to advance and exploit them. At the core of this proposed work is the use of a novel magnetic device that is combined with traditional integrated circuit technology to enable a scalable and power efficient neuromorphic computer chip. The design will be optimized to handle "big data" problems that require extremely power efficient implementations, such as real-time processing of a video stream for a medical imaging application. Such implementations are challenging for various reasons, most notably the storing of values for a large number of artificial synapse weights, and efficient methods to compute random numbers that are needed to make artificial neuron spiking decisions. Carnegie Mellon researchers are focused on addressing these two key challenges in the proposed work.