SHF: Small: A Mosaic-Like Approach to the Selection of Fault Models

Purdue University, West Lafayette IN

Investigators

Abstract

Electronic chips are susceptible to defects that occur during their manufacturing as well as their lifetime. As technologies advance, the susceptibility to defects increases because of more complex manufacturing processes and smaller feature sizes. Detecting the occurrence of defects is critical to the correct operation of electronic chips, and the correct and safe operation of the many products that include them. This project will prepare students for the challenges of designing and manufacturing reliable electronic chips in current and future technologies. The PI of this project is a female faculty member at the Purdue university, and will play role model for women and underrepresented groups to encourage them for pursuing degrees in the field of electrical and computer engineering, thus contributing to the much needed diversity in the future workforce. To manage the complexity and variability in defect behaviors, fault models are used as abstract representations of defects, and a comprehensive set of tests targets the detection of faults from different models. However, faults from different models may have similar tests, and when tests do not exist, defects in certain areas of the chip remain uncovered. To address the need to detect defects in the entire electronic chip, in this project, the faults are considered as pieces in a mosaic, and the goal is to ensure that the mosaic is complete. Completeness is achieved when every area of the mosaic is covered by a sufficient number of pieces. In terms of faults, completeness is achieved, for example, by defining a new fault model to complement an existing one such that tests exist independently for faults from the two models. The mosaic-based approach will be implemented as part of an industry-inspired framework that produces information about likely-to-occur defects, and using commercial tools.