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PFI:AIR - TT: RelMaster: Towards a Reliability Simulation Toolset

$239,999FY2017TIPNSF

Georgia Tech Research Corporation, Atlanta GA

Investigators

Abstract

This PFI: AIR Technology Translation project focuses on translating semiconductor reliability simulation technology to fill the need to estimate lifetimes of high-reliability projects. This is especially important in the aeronautics, automotive, medical, and space segments of the semiconductor industry because these products must achieve lifetimes well beyond those for which the technology used for their manufacturing was designed. The reliability simulation software will lower the cost and time-to-market of high reliability semiconductor products by mitigating the risk of circuit failures of accelerated lifetime tests, which are performed immediately prior to releasing a product to market. When a circuit fails accelerated lifetime tests, it must be re-designed and re-manufactured prior to release to the marketplace, at a cost of hundreds of millions of dollars. This project will result in a minimum viable product, which is software for a lifetime check for semiconductor circuits. This semiconductor reliability simulation technology has the following unique features: the software works at the system level, covers both front-of-line and back-of-line wearout mechanisms, and can incorporate customer-defined use scenarios. These features provide a more complete solution to the wearout simulation problem when compared with the leading competing reliability simulation software in the market space (covering only device-level aging incorporated in device models). This project addresses the following technology gaps as it translates from research discovery toward commercial application. The work incorporates three tasks, a comparison with standard industrial methodologies, calibration techniques for adjusting models to experimental data, and refinement of the simulation methodologies to enable scalability to large industrial designs. Approaches include the use of accelerated tests for circuits, where test conditions are selected to isolate each wearout mechanism, so that failures due to a wide variety of wearout mechanisms can be observed, unlike industrial standard practice. Scalability to large-scale designs will be demonstrated after development of methods to incorporate steps in the existing design flow and automation. The goal is to demonstrate a reasonable computational cost and minimal impact on time-to-tapeout. In addition, personnel involved in this project (Ph.D. students) will receive innovation/entrepreneurship/technology translation training through working with the project's business mentor, Jonathan Goldman. This project engages Aeroflex Corporation to demonstrate calibration of the experimental data to simulation results in this technology translation effort from research discovery towards commercial reality.

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