Negative Capacitance Phosphorene Tunneling Field Effect Transistors

University Of Minnesota-Twin Cities, Minneapolis MN

Investigators

Abstract

The project intends to study the problem of how to create a transistor that can be switched between its "on" and "off" states with less energy than a conventional transistor. It attempts to break through a fundamental problem in semiconductor chip technology called the "thermionic" limit by combining two mechanisms, tunneling and ferroelectricity, with the emerging field of two-dimensional materials. Such a technology would be a breakthrough in the semiconductor industry leading to smaller computer chips that could perform more functions, and be more easily integrated into mobile and internet-of-things applications. The project will be an ideal training ground for graduate students, as they will simultaneously be able to work on a problem of vital importance to the semiconductor industry, while at the same time, explore many fundamental aspects of quantum mechanics, material science and device physics. Aspects of this work will also be utilized in an undergraduate semiconductor device class, where the results provide an ideal example of a device that combines several "end-of-the-roadmap" concepts. Finally, the results from this project will be incorporated into a summer school outreach program at the University of Minnesota and be utilized for K-12 outreach activities such as in-class demonstrations and interactive activities that can generate excitement about engineering and scientific careers in general. The goal of the proposed research is to design, fabricate, characterize and analyze the properties of a novel steep-subthreshold slope negative capacitance tunneling field-effect transistor made using the two-dimensional nanomaterial, phosphorene. The device combines two mechanisms: Fermi-function filtering and negative capacitance gate dielectrics to create a device capable of extremely sharp turn-off behavior that is well below the thermionic limit of 60 millivolts per decade. The device further utilizes phosphorene as the channel material, which is an ideal material for tunneling transistors due to its narrow band gap and anisotropic effective mass. The research scope and methods include the development of techniques to create controlled heterostructures in phosphorene with monolayer precision, study of the orientation-dependence of band-to-band tunneling in phosphorene pn junctions, investigation of ferroelectric material deposition and interface quality with phosphorene, fabrication of characterization of the novel steep-subthreshold slope device, and development of a predictive model of the device performance. The intellectual significance of the proposed work is that it addresses key technical challenges associated with two-dimensional semiconductors and ferroelectric materials and answers fundamental questions about the ultimate limits of low-energy transistor operation, thereby tackling one of the most pressing challenges facing the semiconductor device community.