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SaTC: CORE: Small: Collaborative: EM and Power Side-Channel Attack Immunity through High-Efficiency Hardware Obfuscations

$250,000FY2017CSENSF

Georgia Tech Research Corporation, Atlanta GA

Investigators

Abstract

In the increasingly digitally connected world, data security and privacy have emerged as key challenges, from a personal to a national level. Encryption is at the heart of securing data and when mathematically secure encryption primitives are implemented in physical hardware, they exhibit vulnerability to smart attackers due to unintentional leakage of physical signals during encryption process. This research is exploring new ways to modeling the fundamental cause of such leakages in electromagnetic and power signatures and developing efficient hardware obfuscations and countermeasures to improve security of future systems. Both the PIs are actively involved in both undergraduate and graduate research, and will disseminate the findings through publicly accessible models, involving and training undergraduate/graduate students to increase awareness of the security vulnerabilities, possible countermeasures and best practices. Side Channel Attacks (SCA) utilize unintentional physical leakage signals during encryption process such as Power (i.e., current at the power pin), electromagnetic (EM) radiation, acoustic etc. to steal secret keys. This project is investigating EM and Power SCA on Advanced Encryption Standard (AES) engines, including the origin of EM SCA, and exploring efficient circuit, architecture and hardware level suppression and obfuscation techniques which can provide robustness against possible attacks. If successful, this cross-disciplinary project spanning crypto-algorithm, circuit design and EM analysis will lay the foundations of EM side channel security in mobile platforms and IoT nodes.

View original record on NSF Award Search →