EAGER: Preliminary Study to Demonstrate Feasibility and Advantages of Massively Parallel Server Processors
Suny At Stony Brook, Stony Brook NY
Investigators
Abstract
Today's data centers are under constant pressure to achieve higher performance and improved energy efficiency. However, server processors, which consume the lion's share of energy in a modern data center, have only made incremental improvements in performance and efficiency in more than a decade. This proposal gets at the heart of the problem through investigating a novel processor architecture―designed from scratch with characteristics of modern server workloads in mind―that can provide unprecedented levels of performance and energy-efficiency to the data centers of the future. This work leverages the observation that servers frequently service similar requests concurrently, and execute the same instruction sequences across requests. This implies that the abundant request-level parallelism of servers can be harnessed with a Single-Instruction-Multiple-Threads (SIMT) processor design to achieve drastic improvement in server processor efficiency. Unfortunately, existing SIMT architectures―most notably, Graphical Processing Units (GPUs)―are fundamentally ill-equipped to exploit this request-level parallelism due to stringent quality of service requirements of server workloads. Therefore, significantly different designs are required for SIMT-based server processors. This project investigates the feasibility and challenges of applying the SIMT paradigm to server processors at different layers of the computing stack, from micro-architecture to memory hierarchy to system software. The project explores the performance effect of different hardware and software design techniques on SIMT server processors to identify the features that benefit such processors the most. The results will lay out a path toward significantly improving the energy efficiency of server processors, and open new research directions for the computer architecture and systems community.
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