Technologies for Ultra Energy-Efficient Multicores

University Of Illinois At Urbana-Champaign, Urbana IL

Investigators

Abstract

As semiconductor devices continue to shrink, it is clear that we are about to witness stunning levels of integration. As we proceed through sub-10nm technology, we will be able to integrate over 1,000 sizable cores and substantial memory on a single die. Moreover, die stacking will be the norm. In this environment, the main obstacle to building usable architectures is and will be energy and/or power consumption. To ensure that architecture progress is not bottlenecked by these limitations, architectures need to be redesigned for energy efficiency from the ground up. This work will help develop a set of technologies that will enable the next generation of ultra energy-efficient multicores. Such multicores, applied to a variety of domains that include energy, transportation, environment, or public health, will deliver major economic and environmental benefits to our nation. The PI envisions this effort as contributing to the research and education on advanced energy-efficient computer architecture at the University of Illinois. The PI is currently teaching courses in computer architecture; he will enhance the courses with the research in this proposal. The project will also have a major impact on industry, since it addresses a real, very timely technical problem. This research project analyzes three transformative, high-risk and high-payoff technologies for ultra energy-efficient multicores. They are: (1) flexible multicores with cores that attain a large range of operation, either through voltage scalability or through combining CMOS and TFET; (2) control-theoretic hardware controllers for energy, performance, and other parameters; and (3) advanced thermal support in 3D-stacked multicores. Moreover, it engages in research in a crucial area using approaches that are radically different from the current research trends.