SHF:Small: Reducing Test Time and Improving Diagnosis for Increasingly Dense ICs

University Of Texas At Austin, Austin TX

Investigators

Abstract

The amount of data required to test and diagnose integrated circuits continues to grow dramatically as technology scales, not only because of larger designs, but also the need for additional tests to target new defects. The density of ICs continues to grow faster than the test data bandwidth between automatic test equipment (ATE) and the chip-under-test, which is constrained by the number of channels on the tester and pins on the chip. This project involves developing new approaches for compression and extraction of data that are fundamentally different from existing techniques and capable of more efficiently reducing the amount of data and significantly improving test time and diagnosis accuracy. The project will provide advanced training to both graduate and undergraduate students, including those from underrepresented groups, in the latest design and test technologies. Several new research directions for improving compression and extraction of test data will be investigated in this project. A fundamentally new approach for extracting information from linear signatures using symbolic canceling will be studied for finding error locations to aid in diagnosis. By combining information from the signature together with structural information from the circuit, much greater diagnostic precision is possible. Improvements in test compression will be pursued through new concepts including (i) bandwidth sharing between test stimulus decompression and output response compaction, (ii) combining linear and non-linear encoding, (iii) low fan-out response compaction architectures, and (iv) dynamic extraction from linear compactors. The new techniques and architectures developed in this project will be implemented and their performance evaluated.