SHF: Small: Collaborative Research: Design of Many-core NoCs for the Dark Silicon Era

University Of Southern California, Los Angeles CA

Investigators

Abstract

The proliferation of computing systems of various forms and scales have significantly advanced science, technology, discovery and society at large for the benefit of human kind. As the key building blocks of current and future computing systems?including the Internet of Things, many-core chip multiprocessors (CMPs) are facing unprecedented power challenges brought on by limits in Dennard scaling. This necessitates many-core chips to be designed with the ability to power down on-chip resources to effectively provide scalable performance while keeping power and energy consumption proportional to computing load. This necessity leads to considerable portions of many-core chips having to go dark, thus ushering in the era of dark silicon. To facilitate dark silicon computing, not only computational resources (i.e., processor cores) but also communication resources (i.e., networks on chips, or NoCs) used to connect the computational resources must be developed that can be powered up or down proportionally with performance scalability in response to prevailing load. This research investigates new opportunities, significant challenges, and innovative solutions for harnessing dark silicon in NoC architectures that meet performance, power and energy requirements in the dark silicon era. The objective is to enable non-essential NoC routers to be powered down when needed as well as to enable a corresponding maximum number of routers and router components to be powered down for a given reduction in the number of powered-up processor cores in order to provide energy-proportional, low-power, on-chip communication. Among some of the specific lines of research that are explored are alternative topologies and coordinated routing algorithms to enable more efficient power-gating of NoC routers, holistic approaches for exploiting coordination between the NoC and other on-chip system components as well as factoring in key application characteristics, and novel packet-oriented dynamic power control schemes that explore energy-saving opportunities beyond the conventionally targeted low-load traffic region. Beyond its technical contributions that can impact fundamental advancement in dark silicon computing, this research also has impact more broadly on research education and outreach. Findings from this research are incorporated into graduate curriculum, courses, and undergraduate research experiences. Outreach activities to broaden participation in computing of persons from diverse backgrounds and development levels are also featured.