GOALI: Multi-Objective Layout Optimization for Multi-Chip Power Electronic Modules

University Of Arkansas, Fayetteville AR

Investigators

Abstract

Advances in semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have led to substantial advances in power devices and are now positioned to dominate the next generation of power electronics replacing silicon devices. This project focuses on design automation software for the automatic layout of power electronic modules. The market share of GaN devices is expected to reach a staggering $15.6 billion by 2022 mainly due to the growing demands in the power and energy sector, the communication infrastructure sector, and the power electronics market. SiC power devices are also expected to grow at equally impressive rates. These new power devices are expected to reduce overall energy conversion losses resulting in an annual savings in the tens of billions of dollars in the US alone. A high-efficiency and green energy infrastructure is vital for reducing overall expenditures and reducing carbon footprint in the environment. These new technologies demand more package level integration to achieve low inductance, balanced impedances, and appropriate thermal management to realize the high performance and long life they promise. The expected outcome from this research effort is a software tool incorporating advanced algorithms that will improve design productivity for engineers while simultaneously enhancing performance and reliability of multi-chip power modules in an analogous way that modern design tools ensure the same for integrated circuitry (IC). Design tools in the IC industry have played an indispensable role in the tremendous advances in consumer electronics worldwide. The power electronics that this tool will impact can be found in all types of applications such as data centers, electric vehicles, trains, airplanes, the electric power grid, and motor drives of all types such as heating and air conditioning units. A team of academic researchers and experienced industrial developers of electronic design automation (EDA) tools will focus on the models and algorithms of PowerSynth, a power module layout synthesis tool. Preliminary findings indicate a need for guaranteeing that power module designs, in particular those that switch at frequencies in the hundreds of kHz, conform to EMI/EMC standards. Further, industrial feedback with respect to those early findings indicate that manufacturability is a first order concern in cost reduction and successful market introduction of wide bandgap power electronics. Electronic packaging must be carefully considered for both performance and reliability. The goals of this research are to create an optimization-driven method for producing the geometrical layouts of multi-chip power modules (MCPMs) that account for the simultaneous electrical, thermal and mechanical issues that can adversely impact performance and reliability of the electronics. Advances in electrical parasitics modeling, thermal modeling, mechanical stress/strain modeling, and optimization algorithms are all expected as part of the project roadmap. These advances will culminate in a software tool that can synthesize geometrical layouts that minimize and balance electrical parasitics, manage thermal distribution in-package, and mitigate mechanical stresses that sacrifice module integrity. Finally, reliability analyses will form the basis for quantifiable manufacturability metrics.