Utilizing Memory Parallelism for High Performance Data Processing

Illinois Institute Of Technology, Chicago IL

Investigators

Abstract

While advances in microprocessor design continue to increase computing speed, improvements in data access speed of computing systems lag far behind. At the same time, data-intensive large-scale applications, such as information retrieval, computer animation, and big data analytics are emerging. Data access delay has become the vital performance bottleneck of modern high performance computing (HPC). Memory concurrency exists at each layer of modern memory hierarchies; however, conventional computing systems are primarily designed to improve CPU utilization and have inherent limitations in addressing the critical issue of data movement in HPC. In this research, the PI proposes the concept of memory parallelism and the customized parallel memory (CuPM) system architecture in order to address data movement bottleneck issues. CuPM is an architecture designed to exploit memory concurrency to support high performance data processing (HPDP). This new abstraction extracts the general principles of parallel memory system by building on the new Concurrent-AMAT metric, a set of fresh theoretical results in data access concurrency, a series of recent successes in parallel I/O optimization, and new technology opportunities. CuPM is a novel cross-layer and cross-cutting approach for exploring and utilizing current and future memory technologies based on opportunities arising from memory concurrency. Current HPC systems do not fully recognize or exploit the concurrency that modern memory systems provide. The key new idea of CuPM is to establish a systematic way of exploring, enhancing, utilizing, and customizing memory concurrency to build effective memory systems. It will be developed with two goals: to understand and reveal the memory concurrency and its properties, and to explore and utilize current memory concurrency for HPDP. The former will evaluate the potential of the latter; while the latter will verify and testing the former. Together, they enable CuPM to address a central challenge for extreme computing ? efficient memory systems. The proposed CuPM architecture has the potential to transform systems from application through runtime through architecture.