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SHF: Small: Memory Persistency: programming paradigms for byte-addressable, non-volatile memories

$499,996FY2015CSENSF

Regents Of The University Of Michigan - Ann Arbor, Ann Arbor MI

Investigators

Abstract

For over a decade, researchers in industry and academia have sought new techniques to store data so vast amounts of data can be stored inexpensively and accessed quickly. Today, computer systems typically have three kinds of data storage: rotating disks for cheap-but-slow, long-term, bulk data storage; main memory for fast, but expensive access to data applications are actively using; and FLASH, which behaves much like rotating disks, but offers somewhat faster access at a higher price per bit. However, we are now at the cusp of availability of new storage technologies that offer performance close to that of main memory, but can store data durably?that is, when the computer is powered off?at a cost per bit between Flash and main memory. These new non-volatile memory devices add a new layer to the computer system data storage hierarchy between memory and FLASH. Within a decade, systems incorporating these new non-volatile memories will become widely available. Indeed, as cost and manufacturing processes improve, such memories may become the preferred storage for small devices in the ``Internet of Things'' and become critical to performance and recoverability in cloud systems. These new memories open up the possibility to explore new formats and structures for storing data across computer system power failures. Unlike disk and FLASH, data in non-volatile memories can be accessed at very fine granularity?individual data items (e.g., bytes)?rather than coarse-grained blocks of data. This fine-grain access enables the development of data structures that reliably store data even if power fails unexpectedly, but with greater performance and simplicity than data storage on disk or FLASH. Existing computer main memory systems have not been designed with durability across power failures in mind, since the data is lost when power fails, and therefore do not try to maintain any specific order in which data is written to memory. However, controlling this order of writing data is critical to allowing a system to recover and continue operation if power fails while writes are in progress. This research project will develop new ways for programmers to efficiently and easily design high-performance data structures that can recover from unexpected failures by carefully controlling the order in which data is recorded. The research will be performed in close collaboration with industry, and integrated with the principal investigators? course offerings in operating systems and parallel computer architecture.

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SHF: Small: Memory Persistency: programming paradigms for byte-addressable, non-volatile memories · GrantIndex