Nanoscale Templated Growth for Integration of Electronic and Photonic Materials

University Of Southern California, Los Angeles CA

Investigators

Abstract

Nontechnical Description: Complex electronic circuits and systems that impact our life range from tablet computers and cell phones to electronic games and autonomous vehicles. These systems are a consequence of the relentless miniaturization of transistors that now allows over a billion of them to be integrated on the same silicon chip. This scaling, that has followed 'Moore's Law', has now saturated and the exclusive use of conventional Si-based materials is no longer adequate. Thus, other crystalline materials than Si must be integrated onto the chip to provide higher performance and to enable optical devices to be integrated. Direct localized crystalline deposition is the approach most likely to result in the economical and practical integration of these dissimilar materials. This project explores novel, yet practical, approaches to guide the nanometer scale crystal formation that results in high quality devices and circuits integrating many different materials. It utilizes the talents of a diverse team and provides education and training in nanoscale materials processing and characterizations. The efforts in disseminating the science behind today's electronic systems include K-12 outreach and a summer teacher training module that involves all team members. The new research results are communicated through publications and a semiconductor technology course taught by the PI that is offered over the University of Southern California distance network. Technical Description: This project explores a technology in which a Si integrated circuit wafer acts as an atomically ordered breadboard on which crystalline materials of many different kinds are integrated into a mosaic of nanoscale "epitaxial" elements that perform different functions within an integrated system. The research builds on the idea that hetero-epitaxial growth can be initiated by a region of ordered material formed on a substrate--a template. Defects in the epitaxial material are minimized, even in highly mismatched materials, by initiating the growth on a template with a small enough footprint that misfit dislocations are terminated at the sides of the growth area. Large area growths are formed by the coalescence of the nano-scale islands into a coherent larger structure through lateral growth. The research is enabled by scaling of devices and nanoscale patterning within the Si technology, by the increasing viability of nanoscale active elements in compound semiconductors and the use of 'templates' to arrange the materials being deposited. The long range (many micrometer to mm) perfection and ordering that once was considered essential to successful device performance is less relevant. Instead, the keys to this technology are the other fundamental materials issues such as the structural quality of the crystalline material region, the accurate positioning of the crystalline islands with respect to substrate markers, uniform and controllable properties from island to island, and the general alignment of the crystalline planes among islands. The project exploits the current state of the art in thin film epitaxy and emerging ideas related to local area epitaxy to produce device quality III-V materials on Si. The research will focus on the formation of defect-free high-gain regions for lasers that can be integrated with Si photonic waveguides and channel regions for high mobility transistors based on III-V compound semiconductors on Si substrates.