Lateral Epitaxial Growth of Nanowires for Electronics

University Of Illinois At Urbana-Champaign, Urbana IL

Investigators

Abstract

The project is jointly funded by the Electronic and Photonic Materials (EPM) in the Division of Materials Research (DMR), and by the Electronics, Photonics, and Magnetic Devices (EPMD) Program in the Division of Electrical, Communications and Cyber Systems (ECCS). Nontechnical Description: From mobile phones, to solar cells, to solid-state lighting, semiconductor devices have enabled our modern life. This research project focuses on establishing the fundamental and technical foundation of a new III-V semiconductor nanotechnology platform encompassing nanowires aligned in the surface plane, instead of the common geometry with nanowires aligned perpendicular to the surface. The platform is not only suitable for aggressive scaling of future generations of integrated circuits, but also compatible with the existing planar processing technology for the microelectronics industry. This project provides a natural platform for interdisciplinary research and education activities, allowing curriculum development in nanotechnology, nanomanufacturing, nanoelectronics, and nanoscale non-destructive characterization. Outreach activities involving local and nationwide high-school teachers are carried out in conjunction with a Research Experience for Teachers program led by the principle investigator (PI). Webinars, seminars, short courses, and summer schools are organized to disseminate research results to the general public. Both the PI and co-PI are committed to promoting the participation of underrepresented groups in science and engineering. Technical Description: This project explores the growth and characterization of a self-aligned planar compound semiconductor nanowire array for manufacturable nanoelectronics. The nanowire array grown using lateral epitaxy enables true one-dimensional electronic transport properties and well-defined p-n junctions and heterojunctions. Specifically, fundamental growth and doping studies are carried out through controlled growth, size scaling, doping scaling and control of junction abruptness as well as electrical characterization at the device level. The project tasks/goals are: (1) to achieve III-V nanowire-based arrays with true one-dimensional density of states; (2) to realize lateral p-n junction monolithically for tunnel field-effect transistors; and (3) to understand electrical properties and their correlation with morphology at the nanoscale, using microwave impedance microscopy and nanoscale infrared imaging and spectroscopy. The findings are expected to shed light on impurity incorporation, precipitation, and segregation in the lateral growth and transport properties of alloyed semiconductor nanowires, and ultimately help to accelerate the advancement of fundamental nano concepts as engineering solutions.