Determination of High-Frequency Properties of Integrated Circuit Packages

San Diego State University Foundation, San Diego CA

Investigators

Abstract

Determination of High-Frequency Properties of Integrated Circuit Packages In today's electronic systems, each computer chip can consist of billions of transistors operating at high frequencies reaching multiples of gigahertz. However, chips need to communicate with each other through the chip packages and motherboard, which only provide a limited bandwidth. Chip-to-chip communication occurs through tiny traces that behave as transmission lines in chip packages and boards. Performance of an electronic system is dictated primarily by these electrical interconnections. The goal of this project is the high-frequency characterization of transmission lines and packages. This will allow development of simulation models and improved designs, which will eventually lead to faster computer systems. The project includes an industrial partner, which will provide a unique experience for the involved students in terms of internships and co-advising of theses. The education of graduate students involved in this project will also be enhanced by an international collaboration. Students from underrepresented groups will be offered assistantships through this project. The PI will continue outreach to high-school students to enable and encourage their participation in scientific conferences. The outcome of this research will be disseminated broadly to the engineering community in terms of a web-based application. Results of the project will also be part of a new graduate course on signal and power integrity. Interconnects in chip packages cause signal attenuation and crosstalk, which limit the speed of high-frequency analog and high-speed digital systems. Performance of interconnects depends on the complex permittivity of the substrate as well as the under-fill material. In addition, surface roughness of conductors causes signal attenuation that may increase unpredictably at high frequencies. Hence, determination of these high-frequency properties is necessary for designing robust chip packages that can support faster signals. For the under-fill materials, the PI will design a semi-viscous-material holder in the form of a cavity resonator. The complex permittivity will then be extracted at the resonance frequencies. For the substrates and conductors, the PI will test a new methodology based on double-width stripline measurements. This methodology can for the first time provide unique characterization of substrate losses in the presence of surface-roughness losses. The measurements will be done using vector network analyzers, micro probes, and a probe station up to 67 GHz. Hence, this project will generate data on high-frequency properties of all critical chip package materials. Finally, simulation models from measured data will be generated for both conductors and dielectrics using a new generalized Debye modeling approach. Collaboration with an industrial partner will enable access to advanced package materials and processes for this research.