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SBIR Phase I: High-Performance Analog-to-Digital Conversion for Broadband Applications

$149,997FY2014TIPNSF

Seamless Semiconductors Inc., New York NY

Investigators

Abstract

The broader impacts/commercial potential of this Small Business Innovation Research (SBIR) Phase I project will be to enable high-performance analog-to-digital converters (ADCs) that are most ideally suited for consumer products like multi-standard digital TVs ($0.7 billion market by 2015) or professional instrumentation like the mid-range oscilloscopes ($1.8 billion market by 2019). The developed technology and design expertise can further be used in a wide variety of other ADC markets including base stations, hard-disk drives and mobile & WiFi chipsets. The proposed broadband analog-to-digital-conversion technology provides technological advances in electronics that impact the society at large including consumer electronics and high-end instrumentation needed for scientific progress. This Small Business Innovation Research Phase I project aims to develop high performance analog-to-digital converters (ADCs) for wideband digitization. Fundamental advantages of digital computation techniques in integrated circuits have made possible complex systems-on-chip (SoCs). These SoCs drastically reduce the size and power consumed in modern electronics. The need to interface powerful digital cores to the real, analog world places critical performance requirements on the analog-pre-processing required in the interfaces, specifically on ADCs. As digital-oriented CMOS scaling continues towards lower supply voltages and denser and faster switching devices, traditional analog design techniques lack the desired performance by several technology generations. This has made implementing high-performance and power-efficient ADCs very challenging. This project proposes ADC architectures that leverage a unique design paradigm for analog/mixed-signal circuits and ADCs in nanoscale digital CMOS technologies. The proposed ADCs uniquely exploit the operation of transistors to overcome challenges associated with the design of traditional voltage-mode analog circuits. The proposed technological innovations are expected to bring together high performance and low power and with the cost-advantage offered by CMOS technologies.

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