Efficient Unconventional Computing with Adaptable Memory Circuit Elements

University South Carolina Research Foundation, Columbia SC

Investigators

Abstract

The objective of this research is to develop novel approaches to massively-parallel computing via utilization of memory circuit elements - resistive, capacitive and inductive devices with a memory feature. A network of memory circuit elements will be used as a core of a specialized processor suitable for an efficient solution of different graph theory optimization problems. A significant advance in the computation power will be achieved due to a massively-parallel network dynamics in which all network components are simultaneously involved in the calculation. This project will focus on designing of massively-parallel processors based on memory circuit elements, developing algorithms for such processors and their simulation. Intellectual Merit This project will develop a fundamentally new massively-parallel platform and algorithms for efficient solution of certain graph theory optimization problems. It will also advance the state-of-the art for models of memory circuit elements. Broader Impact Massively-parallel computing based on adaptable memory circuit elements shows promise for extremely fast solution of different optimization problems having numerous applications in such diverse fields as topology, robotics, traffic optimization, and psychology. the research results, their publication and presentation at conferences, as well as an interdisciplinary training of the next generation of scientists will contribute to ensure the national leadership in advanced technology.