SHF: Small: Efficient and Accurate Methodologies for Unifying the Layout, Device Simulation, and Process Simulation Worlds

Princeton University, Princeton NJ

Investigators

Abstract

Due to the severely degraded short-channel behavior of MOSFETs, Intel and TSMC have announced their switch to multi-gate FETs at the upcoming technology nodes. Hardware experiments with multi-gate devices and larger circuits entail very high cost and turnaround time. Thus, efficient predictive 3D-Technology CAD (3D-TCAD) based process/device characterization methods for such devices/circuits are urgently needed. A lack of such methods currently poses a significant impediment to rapid progress in this area. Though 3D-TCAD based exploration is essential for accurate predictive modeling, it is beset with major challenges which makes it necessary to develop a seamless set of methodologies/algorithms integrated with 3D-TCAD eco-systems for resolving process, layout, and device level issues quickly. The main aim of the proposed work is to develop efficient and accurate methodologies for unifying the layout, 2D/3D device simulation, and process simulation worlds, thereby, for the first time, expanding the horizon of predictive modeling for multi-gate devices beyond the many-device TCAD barrier, which is a major showstopper at lower technology nodes. The project aims to develop a set of versatile methodologies for synthesizing contiguous 2D/3D device-simulation-ready structures corresponding to given layouts, without the need for repetitive and expensive 3D process simulations on each layout. These methodologies are expected to yield several orders of magnitude speedup in TCAD structure generation for large layouts, with run-time reduction from days/weeks to a few hours per design and decreased memory footprints. The project will also develop fast cache-extrapolate-update techniques to alleviate the problem of obtaining convergence with iterative linear solvers for both mixed-mode and contiguous 3D device simulation. The methodologies developed in this research will break the many-device TCAD barrier and, by unifying layout with process/device simulation, make accurate and efficient predictive 3D-TCAD possible. The methodologies/tools that are developed will be disseminated through the web, conferences and journals. The material will be included in a course on Design with Nanotechnologies that the PI teaches at Princeton University. Princeton has a tradition of undergraduate independent research. Many senior students are expected to do their research project on this topic. Female and minority students will be attracted to this research through Princeton's Fellowship Program. Further outreach activities are also planned for high-school students.