EAGER: Collaborative Research: Compiler and Architecture Support for Avoiding Writes to Memory-Preliminary Study

University Of North Texas, Denton TX

Investigators

Abstract

The cost of writing data from a computer's processor to its storage components remains a bottleneck for modern computing systems. The speed of the processor continues to improve, more processing units are packed into a computer chip, but these advances only cause more data to be written to storage per second. The speed of storage subsystems has not kept pace with the processor?s ability to produce data for storage, and this difference in performance is likely to continue. Moreover, the trend in building storage subsystems for computers is to utilize technologies such as flash memories whose contents can be changed a relatively small number of times before the memory wears out. These technologies are cheaper and pack more storage into a given area, but care must be taken to avoid writing to memories made from such technologies at rates usually seen from a processor to memory. This EAGER project aims to discover mechanisms that reduce or eliminate traffic from a processor to the storage subsystem. Elimination of such traffic increases the speed of the overall system and saves wear on storage components. This research finds data that would otherwise be sent to storage from the processor and eliminates such writes to memory. This technique is based on finding that such data cannot subsequently be referenced by an application. This effort focuses on a preliminary study to validate the technical approach, namely investigating the consequences of eliminating stores of data that has been explicitly deallocated by an application.