CAREER: Analog-Assisted Sensing and Repair for Achieving Robust Near-Threshold Computing

Oregon State University, Corvallis OR

Investigators

Abstract

ECCS-1151225 Patrick Chiang, Oregon State University CAREER: Analog-Assisted Sensing and Repair for Achieving Robust Near-Threshold Computing Intellectual Merit: The goal of this CAREER proposal is to explore analog/mixed-signal sensing circuits and systems that will enable process-robust computing operating in the near-threshold regime. Sub/near-threshold computing, where the supply voltage is aggressively scaled to near the threshold voltage, has been shown to improve energy-efficiency by approximately an order of magnitude, but is not viable for most research and commercial applications due to two critical limitations. First, near-threshold operation can exhibit exceedingly large, process-varying delays, leading to unpredictable performance and throughput. Second, an increase in the number of parallel cores operating in near-threshold is required in order to compensate for the reduction in clock frequency. The result is a greater dependence on the low-power on-chip interconnect that connects these multiple cores. Low-voltage swing on-chip interconnect for near-threshold operation are therefore essential, but these reduced signal amplitude levels can significantly impair bit-error rates. Previous techniques to combat the excessive delay variations, such as Razor-like error detection sequentials, are unsuitable for the expected 10x delay spreads observed in near-threshold. We propose a new completion detector using analog sensing of the current consumed in computation, detecting sub/near-threshold delays with significant improvements in power, area, and throughput over conventional techniques. We will build upon this analog-assisted sensing by then exploring the merits of semi-asynchronous pipelining. For on-chip interconnects operating in near-threshold, we propose analog sensing of these parallel low-swing transceivers, periodically monitoring and assessing the bit-error rate. In-situ measurement and calibration of process non-idealities exacerbated by near-threshold operation will be investigated, providing the ability to optimize the trade-offs between on-chip link reliability and power consumption. Broader Impacts: The proposed research promises to impact related academia, industry, and society at large by laying the groundwork for the design of next generation, energy-optimal computing platforms. Applications include energy-constrained medical devices, where reliable performance at minimal consumed power is critical in order to improve battery size and lifetime. Furthermore, our fundamental research into unexplored problems in near-energy-optimal design and delay-variation resilient architectures opens new avenues for reducing the cost of chip testing and design verification. The education goals will be to increase enrollment and retention of minority undergraduate/graduate students in engineering, and apply the newly discovered research innovations directly to the curriculum. Furthermore, this proposal promotes international collaboration in the design and fabrication of low-power, near-threshold prototypes. By providing US students, especially minority students, the opportunity to work first-hand with international colleagues, this proposal will furnish US engineering students with the leadership qualities necessary for the future globalized workplace.