CIF: Small: Efficient Hardware For Complex Communications Processors

University Of California-Davis, Davis CA

Investigators

Abstract

Communications systems are becoming increasingly commonplace and appear in a vast variety of applications such as: mobile phones, the internet, embedded systems, and medical devices. As systems become more sophisticated, the demands on processors to compute complex workloads also increase for several reasons: large increases in data throughput rates, and the computational tasks required in a sophisticated system become more complex and more numerous. At the same time, power dissipation demands are becoming ever more stringent due to trends such as increased portability requiring battery-powered operation. The objective of this project is to study, design and implement digital processors that utilize novel algorithms and architectures for complex communications systems. Processors across a wide variety of implementation architectures will be examined including: dedicated-purpose processors and many-core arrays. Three complex workloads which are critical components of many modern communications systems will be studied: software-defined-radios (SDRs), Low Density Parity Check (LDPC) decoders, and Multiple-Input Multiple-Output (MIMO) related processing. Results of this research are expected to enable new application capabilities that were previously not possible. Lessons learned from the project will be deployed in two undergraduate courses and one graduate course. The PI is active in several campus-wide and national organizations that work to attract and retain members of under-represented groups to engage in research and complete graduate degrees in science and engineering. Research effort and results will be instrumental in the cross-disciplinary training of future scientists and engineers in the design of future communications systems.