SHF: Medium: Hardware/Software Partitioning for Hybrid Shared Memory Multiprocessors

University Of California-Riverside, Riverside CA

Investigators

Abstract

Hybrid multiprocessor architectures present an unprecedented opportunity for high performance computing through the seamless integration of large number of processors and hardware accelerators. This project addresses the research challenges in the design and exploitation of hybrid multiprocessors through innovations that span across the areas of architectures, compilers, and high-performance computing. A hybrid cache coherent non-uniform memory access (CC-NUMA) architecture is designed that clusters CPUs, hardware accelerators, and memories to preserve locality and reduce memory latency. Partitioning models are developed to enable optimal partitioning of data among CPUs and hardware accelerators. Compiler techniques are developed for detection of parallelism, its partitioning, and assignment across CPUs and hardware accelerators. The project enables coexistence of data streaming (push data) and data fetching (pull data) mechanisms. The research benefits from detailed measurements using a 64-processor SGI Altix 4700 CC-NUMA machine with FPGAs, the Intel FSB-FPGA architecture accelerator, and Niveus 4000 workstation with NVIDIA GPUs. The research has impact on large-scale scientific computing. The hybrid multiprocessor technology is likely to be transferred to industry while the developed software (compilers, simulators and Hybrid SPLASH-2 benchmarks) will be distributed to researchers. The project also has impact on education and research. The SGI Altix machine is already being used in our graduate classes and further projects on hybrid parallel computing are introduced in architecture, parallel processing, and compiler classes. The project contributes to minority undergraduate education in Computer Science since UCR is recognized for its large undergraduate Hispanic population.