SHF: Small: A Generic Micro-Architecture for Accuracy-Aware Ultra Low Power Multimedia Processing

Georgia Tech Research Corporation, Atlanta GA

Investigators

Abstract

Mobile devices supporting a wide variety of multimedia applications under a very stringent energy budget are a key driver of electronic systems in future. The objective of the proposed research is to explore a generic, programmable, reconfigurable, and energy-efficient architectural platform for future mobile devices for real-time multimedia processing. The aim is to exploit the inherent error tolerance in multimedia applications for run-time energy-accuracy trade-off. The proposed research will analyze the interaction of ultra-low-power computing and error characteristics of real-time multimedia processing. This research will pursue a circuit-architecture-algorithm co-design approach to model, analyze, and demonstrate a reconfigurable hardware platform for memories, datapath, and buses to exploit the error characteristics of real-time multimedia processing algorithms for ultra-low power. This generic architecture for energy-efficient multimedia systems can lay the foundation of future mobile supercomputers performing wide array of applications with minimal energy. The PIs will disseminate the research results through project website, conference and journal publications. The existing interactions with leading microprocessor and mobile handset manufacturers will provide opportunities for technology transfer. The educational goal is to create next generation engineers who understand the effects of energy and accuracy on computations. The PIs will engage in recruiting students from underrepresented groups and mentor students under the Summer Undergraduate Research Experience for minorities (SURE) program at Georgia Tech.