II-EN: Infrastructure Acquisition for Statistical Power, Leakage, and Timing Modeling Towards Realization of Robust Complex Nanoelectronic Circuits

University Of North Texas, Denton TX

Investigators

Abstract

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5). Accurate modeling of power, leakage, and timing while accounting for process variations, is crucial for the manufacturable design of nanoscale CMOS integrated circuits. Thus, there is a pressing need for statistical models that allow design engineers to make fast architectural or system level design space exploration without resorting to a complete design iteration, from system to physical level. The thrust of the project's methodology is the progression of data transfer from lowest (transistor) to highest (system) level while utilizing minimal data from actual silicon. This allows for fast concurrent design for manufacturing of new systems with a clear delineation of the needed data at every level. To conduct research on nanoscale CMOS modeling that can be used for realization of robust circuits, and to make the deliverables available to the VLSI and educational communities, the project utilizes the following infrastructure: (1) Specialized equipment: mixed-signal analyzer, probing station and arbitrary waveform generator for sample data collection, probing and analysis for model validation. (2) Computing resources: a high-end, 4 processor server with 16-GB local memory and 4-TB RAID5 storage to be used by two faculty members and 10 students for nanoscale data acquisition, control, analysis, and storage. (3) Research and development personnel to develop the models and libraries, to validate the methodology, and to maintain the infrastructure. The educational impact of the project is 3-fold: impact on curricula at UNT, impact on curricula of other researchers who will use this infrastructure, and impact on the community colleges around the Dallas-Fort Worth metroplex.