SHF: Small: Thermal-Aware High-Performance DRAM Architectures in Multicore Technologies

Northwestern University, Evanston IL

Investigators

Abstract

Environment Protection Agency estimates that by 2011 data centers nationwide would consume electricity amounting to the equivalent output of about 30 power plants. Clearly, improving the power and thermal behavior of these systems has a direct impact on their energy efficiency and reliable operation. DRAM memories constitute a significant fraction of the power consumed in computers. In addition, in the dawning era of multi-/many-core processors, the performance of a system is largely dependant on its main memory efficiency. This project investigates ways to operate DRAMs at full bandwidth utilization while spending the minimum power per unit of data communicated and maintaining lower operating temperatures. Specifically, this work aims at answering three fundamental questions: a) how can we enhance processor architectures to balance the activity on different DRAM chips to protect chips under thermal stress, b) how can we enhance the DRAM systems to reduce their power consumption and peak operating temperatures, and c) how can we enhance the operating systems to improve the thermal behavior of DRAM systems? Techniques developed in this project will improve the thermal behavior of DRAM systems and hence will reduce the cost of thermal management and decrease the system energy consumption. Furthermore, these improvements will enable new generations of high-performance processors. This, in turn, will enhance the computational capabilities of future computing systems and enable progress in various fields. Finally, projects derived from this work will be integrated into courses contributing to the training of an engineering workforce for an energy-efficient and sustainable society.