SGER: A Hybrid Approach for Petascale Computing: Accelerating Scientific

Princeton University, Princeton NJ

Investigators

Abstract

Intellectual Merit: The proposed work is an exploratory research effort to automatically extract parallelism from sequential program and to schedule the resulting fine-grained computational elements on manycore processors. The goal is to allow existing sequential programs to run on many-core processors efficiently and build the foundation to enable a hybrid approach, involving message passing and shared memory, to address petascale programmability This exploratory research will attack the following issues: ? Design a compiler to decompose the code running on a single node into fine-grained computation tasks to utilize the collection of cores on a single chip. ? Develop a highly-efficient runtime system to schedule fine-grained tasks to optimize for available parallelisms and to maximize on-chip cache locality to overcome off-chip memory latency and bandwidth constrains. ? Evaluate our success with a newly released benchmark suite PARSEC which allows us to compare our success with hand-tuned parallel solutions. We also plan to evaluate one computational science application Broader Impact: The potential impact of this project is significant. First, the success of the proposed research would advance knowledge and understanding in parallel programming to exploit the power of future parallel machines. Second, the success of the project will accelerate software developmentfor petascale computing. Third, the proposed compiler and runtime systems will provide the capability to run existing large-scale computational science programs on petascale computers without burdensome programming efforts.