CPA-CSA-T: Power-Performance Optimization Strategies for Highly Uncertain Multi-core Systems

Cornell University, Ithaca NY

Investigators

Abstract

This project involves minimizing the power-performance efficiency (PPE) loss in future highly uncertain, failure-prone, large-scale (>100 processor) Chip Multi-Processors (CMPs) in which the individual processors are deconfigured in various ways in order to remain operational. Under this scenario of dynamic heterogeneity, the achieved PPE will vary significantly depending on what applications run on which degraded cores. For some assignments of threads to cores, the degradation may be so severe as to render the system unusable. However, the large problem size precludes straightforward search techniques. This problem is addressed through a judicious combination of design-time analysis and runtime measurements coupled with a hierarchical rules-based search algorithm. The algorithm operates at two levels, with the lowest level divided among subgroups of cores. Design time information regarding the characteristics of cores in different degraded states helps prune the search space, while runtime measurements provide feedback about the ``goodness'' of the solution. The result will be a workable solution for future large-scale, highly uncertain CMPs that permits maintaining as close to the peak PPE as possible. The broader impacts of this research involve integrated research and education, broadening the participation of under-represented groups, enhanced infrastructure for research, broad dissemination of results, and potential societal impact.