GOALI: Side gated ultra narrow channel silicon MOSFETs and transport studies at nanometer scale

University Of Connecticut, Storrs CT

Investigators

Abstract

Side Gated Ultra Narrow Channel Silicon MOSFETs and Transport Studies at Nanometer Scale The objective of this research is experimental evaluation of side-gated small scale field effect transistors for extremely low leakage currents and electrostatic tuning, and electronic transport studies at nanometer scale using these devices. The approach is based on accumulation of holes driven from the substrate for electrostatic control of the channel potential and side interfaces, while an inversion layer is formed at the top-gate interface for current flow. This approach also enables additional functionality through multi-input operation. Electronic transport in ultra-small scale and quasi-1D structures will be studied. High resolution capacitance-voltage characterization will be performed utilizing non-linear characteristics of field effect transistors and ambient noise. Intellectual merit: Knowledge gained through this project will contribute to the understanding of electronic transport in small scale devices and restricted geometries which may lead to new device concepts for logic and memory. Very narrow devices with the possibility of side charge trapping for further confinement will enable basic studies of transport in electrostatically formed nanowires and quantum dots. Broader impact: This research will focus on a promising alternative structure to conventional transistors for certain applications. One graduate student will be supported through the project. Undergraduate students will also be involved in the electrical characterization of the devices. The results will be made available through publications and conference presentations. The project will be integrated in ongoing outreach programs in the School of Engineering for K-12 students and teachers to promote math and science education.