CPA-DA: Efficient Sequential Synthesis and Optimization for High-Performance Circuits

Northwestern University, Evanston IL

Investigators

Abstract

PI: Zhou, Hai Proposal No: 0811270 Title: CPA-DA: Efficient Sequential Synthesis and Optimization for High-Performance Circuits Institution: Northwestern University ABSTRACT Processing speed and power consumption have become the most important design criteria in modern high-performance VLSI circuits. They are not only dependent on the combinational part but also on the memory elements (latches and flip-flops) and the clocking mechanism. In the project, we develop an efficient sequential synthesis and optimization framework based on incremental retiming and other network flow techniques. The framework is based on structural operations such as retiming, re-synthesis, and sweep, which are shown to cover almost all possible sequential transformations. A sequential optimization suite based on efficient algorithms for incremental retiming, constrained clock skew scheduling, and sequential floor-planning is developed and will be made available to the public. The outcomes of combined research and education activities improve the performance and design productivity of nanometer VLSI circuits of all types, from high-speed microprocessors to the omnipresent systems-on-a-chips (SOCs) found in PDAs, cell phones, and more. The improvement on performance and design productivity translates to lower cost and better functionality to customers, thus giving all consumers, particularly socio-economically disadvantaged, access to affordable information technology. Furthermore, the high performance computers, enhanced by optimized performance and improved design productivity, will aid research in other important scientific areas such as genetics, bioinformatics, and medicine.