CPA-CSA: Virtualization-Aware Architectures to Accelerate Network I/O Processing

University Of California-Riverside, Riverside CA

Investigators

Abstract

Proposal ID: 0811834 Title: Virtualization-Aware Architectures to Accelerate Network I/O Processing PI name: Bhuyan, Laxmi N. Institution: University of California-Riverside ABSTRACT The current application servers consist of high-performance computing, web and e-commerce servers, proxies, database servers, and multimedia servers, all of which need high rates of network I/O processing. The protocol-processing overhead in these servers dominates the CPU execution time. Power and thermal constraints have forced CPU vendors to turn to core multi-processing (CMP) instead of frequency scaling to increase performance. Complimentary with CMP is surging industry interest in virtualization for diverse uses including server consolidation and sharing of various resources. However, several studies have shown that virtualization brings significant extra overhead to network I/O. The project explores new architectural techniques in virtualized environment that reduces the network I/O overhead through the following approaches: ? Measurement techniques are developed to trace the life of a packet in a virtualized environment with multi-core server and 10 Gigabit Ethernet. Architectural statistics like instruction types, IPC, and cache misses, etc. are measured and compared with the results of the guest O/S protocol. The study reveals architectural bottleneck points in network I/O processing. ? Techniques are developed for intelligent interrupt scheduling, TCP onloading, affinity-based core scheduling, and domain-to-core-mapping to show that the performance is enhanced to a great extent. ? The project implements several architectural techniques, such as ISA optimization for protocol stack, incorporation of network cache and direct cache access, memory copy engines, and CPU+NIC integration; and proves their superiority in performance of a virtualized I/O system. ? In order to evaluate new architectural ideas, a cycle-accurate full system simulator is designed that can evaluate virtualized IO operations. The simulation software is made available to researchers.