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CPA-DA: Design Techniques and Tools to Enable and Enhance Coarse-Grain Power Gating in ASIC Designs

$299,998FY2008CSENSF

University Of Southern California, Los Angeles CA

Investigators

Abstract

PI: Pedram, Massoud Proposal No: 0811876 Title: CPA-DA: Design Techniques and Tools to Enable and Enhance Coarse-Grain Power Gating in ASIC Designs Institution: University of Southern California This project focuses on coarse-grain power gating in ASIC designs, which switches entire blocks/rows of standard cells. This choice is due to lower cost and greater leakage savings of coarse-grain power gating compared to its fine-grain counterpart, which inserts the header or footer in each standard cell in the ASIC design library. The project results are expected to include the following: (i) Distributed sleep transistor placement and sizing; (ii) Sleep signal scheduling to minimize the peak current demand on wakeup; (iii) Mode transition energy minimization to enable more frequent mode transitions; (iv) Local sleep signal generation for autonomous power gating; and (v) Power gating to enable multiple power modes. This proposal aims to address each of these tasks by developing algorithmic or mathematical programming solutions to solving each step and by developing a design flow and prototype software tools that enable widespread adoption of this very interesting and important technology in the ASIC design. The semiconductor industry?s $261 B in 2006 revenue does not accurately reflect its crucial role in enabling a $47 T ($61 T on a PPP basis) world economy to thrive and grow. This industry underpins the systems and technologies on which the people and governments of the world rely on for future prosperity. This industry is currently facing some extraordinary challenges, including variability of nano devices as well as excessive power dissipation in circuits and systems. In order for the industry to continue to expand and prosper, it is critical to address these challenges heads on. The proposed research takes on one of these two fundamental challenges, i.e., the ?power crisis?. The decisive impact of the proposed research will be the enablement of the CMOS scaling to continue unabated for the next 10-15 years. Moreover, the project will actively engage students both at graduate and undergraduate levels. For graduate students, active participation in the research work will enhance their creative and multidisciplinary thinking and prepare them for future independent work. The PI?s commitment of involving undergraduate students in carefully designed projects will help foster their long lasting enthusiasm in scientific research activities. Integration of research into curriculum development and classroom teaching will provide a powerful venue for the dissemination of research results that greatly compliments the traditional venues of conferences and archival journals.

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