Design Methods and Optimization Techniques for Multiprocessor Systems-on-Chip (MPSoCs)

Carnegie Mellon University, Pittsburgh PA

Investigators

Abstract

Project ID: 0 702420 Project Title: Design Methods and Optimization Techniques for Multiprocessor Systems-on-Chip (MPSoCs) PI Name: Radu Marculescu Institution: Carnegie Mellon University ABSTRACT Electronic integrated systems designed at nanoscale will soon contain a billion transistors on a single chip. This makes it possible to integrate hundreds of IP cores running multiple applications simultaneously. However, as CMOS technology approaches the nanoscale domain, increased power consumption, lack of scalability in communication, and reliability of the design at such small sizes make it impractical to build affordable multiprocessor systems-on-chip (MPSoCs) using the existing design methodologies and software tools. Consequently, this project explores the communication-based design as a new paradigm to design the future MPSoCs. More precisely, we propose automated communication architecture synthesis for application-specific Networks-on-Chip (NoCs) where many heterogeneous IP cores communicate via packet switching, similarly to techniques used most commonly over the Internet. The main promise behind our NoC approach is to achieve a truly scalable and energy-efficient solution for on-chip communication, while maintaining manageable design efforts as Moore's law continues to increase chip complexity year after year.