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CAREER: Reconfigurable Memory for Efficient, Secure, Robust Digital Systems

$420,000FY2007CSENSF

Carnegie Mellon University, Pittsburgh PA

Investigators

Abstract

The memory hierarchy of modern digital systems is quickly becoming the preeminent determinant of their performance, efficiency, reliability, and cost. The amount of memory integrated on-die in systems-on-chip and microprocessors has grown significantly and will likely dominate the die area in future generations. Trends in computer architecture are increasing the number and type of requestors making demands on the memory system, yet trends in IC manufacturing and process scaling are making the design and manufacture of efficient, robust memories more difficult. To address these trends, this project explores adding reconfigurability to the memory system at the circuit, microarchitecture, and architecture levels to boost the efficiency and robustness of the design. It also explores how reconfigurability can also be used to enhance the security of the design by obscuring the design intention and enabling efficient encryption implementations with a customized memory system. The conditions under which the increase in efficiency and security from tailoring the memory system to the application via reconfigurability outweighs the VLSI overheads of adding that reconfigurability will be investigated. How reconfigurability can be used to increase the robustness and yield of digital ICs by allowing the memory to adapt to process, voltage, and temperature variations and mask faults occurring at manufacture-time and after deployment will also be investigated. In summary, this project should result in reconfigurable memory solutions targeted at efficient, secure, robust, general-purpose computing systems and an understanding of the overall reconfigurable memory design space.

View original record on NSF Award Search →